A conventional semiconductor inspection apparatus inspecting a semiconductor wafer generally uses a contact-type method in which an inspection is performed by having a probe pin contact a pad on a semiconductor wafer, however, in recent years, non-contact-type methods in which an inspection is performed by means of wireless communication with subject chips in a semiconductor wafer without contacting them has been used since the semiconductor wafer may get damaged or it is difficult to adjust the contact pressure in the contact-type method.
For instance, Patent Document 1 discloses a non-contact signal transmission method using wireless communication that performs inspection by using semiconductor chips (the subject chips) having communication coils formed therein in a semiconductor wafer, wirelessly transmitting an inspection signal from the head of the semiconductor inspection apparatus to the communication coils, and transmitting the inspection results from the communication coils to the head after the functions of the semiconductor chips receiving the inspection signal have been inspected. In this method, each semiconductor chip in the semiconductor wafer is inspected by moving the head or the semiconductor wafer.
Meanwhile, Patent Document 2 discloses a wafer inspection apparatus using non-contact signal transmission that comprises a data transmitting/receiving unit that faces a subject wafer in a non-contact state and a tester connected to the data transmitting/receiving unit, starts an inspection when the subject wafer receives an inspection signal from the data transmitting/receiving unit, and has the subject wafer transmit the inspection results to the data transmitting/receiving unit after the inspection is completed.
However, since the conventional methods can inspect only one semiconductor wafer at a time and cannot simultaneously inspect chips more than the number of chips formed in a semiconductor wafer, these methods are limited in terms of reducing the inspection time per chip. Meanwhile, the number of chips inspected simultaneously can be increased by having a plurality of semiconductor inspection apparatuses operate in parallel, however, adding more semiconductor inspection apparatuses will increase the cost.
Patent Document 3 discloses a method for reducing inspection costs in which the inspection time per chip is reduced by increasing the number of chips inspected simultaneously. The technology described in Patent Document 3 is a burn-in apparatus that holds a plurality of semiconductor wafers in a wafer holder and presses electrode chips to wires formed in peripheral edge zones of semiconductor wafers, and according to this burn-in apparatus, a plurality of semiconductor wafers can be screened simultaneously by electrically contacting the plurality of semiconductor wafers.    [Patent Document 1]    Japanese Patent No. 379871613    [Patent Document 2]    Japanese Patent Kokai Publication No. JP2004-253561A    [Patent Document 3]    Japanese Patent Kokai Publication No. JP2000-269278A